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The Coprocesor

A coprocessor is an auxiliary processing unit that is used to supplement the processing power of a microprocessor. In short, a coprocessor is an add-on that provides functionally that could not be incorporated in a processor for either economic or technical reasons.

Early microprocessors struggled to provide sufficient functionality on a single silicon chip You got a device that fetched instructions and executed instructions on integers. Floating-point operations, string processing, memory management and many of the functions we expect a processor to perform did not exist.

A processor can be designed to delegate certain operations to one or more external coprocessors. This takes requires two elements: a means of incorporating new instructions into the existing coprocessor architecture and a means of communicating between the processor and coprocessor. Ideally, these tasks should be invisible to the user and a processor-coprocessor pair should appear just as a processor with an enhanced instruction set architecture.

Note that there is a difference between an accelerator and a coprocessor, although both have the same function that is, to enhance performance. The accelerator improves the performance of a system exactly like the coprocessor, but the accelerator is not an extension of the processor’s architecture. It is usually a memory-mapped peripheral that can be accessed from the system bus.

The microprocessor itself fetches instructions from memory, and, if an instruction is a coprocessor instruction, the CPU passes it to the coprocessor by means of a bus (which may or may not be dedicated). Moreover, the processor is normally responsible for fetching any data required by the coprocessor.  .

ARM Coprocessors

Coprocessors for the ARM are connected to it via its data and control buses. When the ARM first encounters an instruction that is not part of its current instruction set, the ARM regards it as a potential coprocessor operation. It is treated only as an illegal instruction exception after it has failed to be accepted buy a coprocessor.

Moreover, because the ARM offers predicated instruction, an op-code that would not be executed because of the predicated condition and state of the condition flags, is not executed irrespective of whether it is a valid coprocessor instruction or not.

When the ARM detects a potential coprocessor instruction, is asserts CPI, coprocessor instruction, which is monitored by all coprocessors in the system. A coprocessor can read the instruction from the data bus and check for both a valid coprocessor ID and a tag (one of 16). If there’s a match, the coprocessor responds by asserting CPA, coprocessor absent. Now the coprocessor can assert, CPB, to take control until its operation has been completed.