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MIPS: A Brief History

MIPS is a RISC-like microprocessor with a special place in the history of computers. First, it is a pioneering processor – one of the first of its type. Second, it was developed by an academic in an academic environment rather than a large industrial organization like Intel, Motorola, or Texas Instrument. Third, it has had a major impact on the teaching of computer architecture because its originator wrote a computer architecture text based on the MIPS architecture that was to become the dominant force in computer architecture education.

MIPS arose out for Dr. John Hennssey’s work on computer architecture at Stanford University in the early 1980s. At that time, there was a growing interest in so-called reduced instruction set computers, RISC, and similar work was being carried out at the same time at UC Berkeley. RISC concepts are said to have grown out of IBMs 801 project headed by John Cocke. The 801 was an experiments 32-bit computer that was never actually put into commercial production but was to have an impact on the future development of instruction set architectures.

By the 1980s microprocessors were becoming increasingly complex and ad hoc with new instructions tacked on to existing instruction sets year by year. Moreover, by the 1980s 32-bit designs were commercially possible and it was no longer necessary to use an 8- or 16-bit instruction and employ multiple words to get 32-bit instructions. For the first time, it was impossible to design an instruction set architecture with a well thought out set of instructions and a reasonably large set of user-accessible registers.

John Hennessey joined other to launch MIPS Computer Systems to produce MIPS processors. However, this company, like ARM Holdings, was fabless and did not manufacture the chips themselves. Their first product, the MIPS R2000, was launched in 1985; their second generation processor, the R3000, in 1988.

Over the years, MIPS continued to develop with the MIPS I, MIPS II, MIPS III, MIPS IV and MIPS V instruction set architectures. Today there are 32-bit MIPS (the original concept), a 16-bit variation (rather like the ARM’s thumb state), and a 64-bit MIPS (the MIPS64).

Silicon Graphics Inc., SGI, was a company set up to design and market high-end workstations, initially for the 3D graphics market. In its early days, SGI had used Motorola’s 68K processors, and they switched to MIPS in 1991. So important was MIPS processors that SGI acquired MIPS Computer Systems in 1992 MIPS Computer Systems  then became known as MIPS Technologies.

At its highpoint SCI was producing the workstations that virtually all top Hollywood movies used to develop their digital effects into the 1990s. However, SGI threw in their lot with Itanium which did not prove to be the anticipated success and in 2006 SGI announced that it was ceasing development of MIPS processors. In 2007 SGI turned to Intel’s Xeon processors. After about 2005 it was downhill all the way for SGI and the company was finally acquired by Rackable Systems in 2009.

MIPS technologies licenced their designs to other manufacturers and the processor became widely used in embedded systems. MIPS technologies became independent of SGI in 1998 and survived SGI’s demise.

In 2013, MIPS technologies were acquired by the British company, Imagination Technologies Group plc. Imagination technologies are already selling PowerVR technology processors in conjunction with NEC. PowerVR technology is dedicated hardware intended for high-performance 3D graphics processing.

Features of the MIPS Family

R2000 First commercially available MIPS which also included multiply and divide units, although these required more than one cycle to perform an operation.

Unusually, MIPS supported both little- and big-endian data modes. The actual mode could be chosen by the user unlike the IA32 (little endian) or 68K (big endian).

There is no status/condition code register. Branches are made either as the result of a specific operation or as the result of a test on a specific general-purpose register.

The program counter is not user accessible like the ARM’s PC.

The R3000 series (1988) extended R2000 by adding memory management and cache facilities. The ISA itself was not extended.

The R4000 series introduced in 1991 extended the MIPS ISA to the MIPS64, a true 64-bit architecture. The floating-point processor functions were moved from the co-processor to the CPU die itself. Pipelining depth was extended and the cache enhanced by the inclusion of a level 2 cache.

The R8000 series, introduced in 1994, introduced MIPS to the bad boy of microarchitecture, superscalar design. In 1995 the R8000 architecture was extended to include out-of-order execution. This is, of course, a feature of the microarchitecture and does not impact the user visible ISA.

Newer versions, the R10000, R12000, R14000, and R16000, have all extended the MIPS by adding features such as larger cache and high-speed DRAM interfaces.