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In this short article I’m going to try and explain how transistors work and how they’re fabricated.  This is, of course, an impossible task. All I can do is to provide a faint glimpse into the semiconductor world. Semiconductors are remarkable devices for three reasons. First, they provide the amplification needed to power radios, televisions, computers, and audio circuits. Second, they can be made small; so small, in fact, they you can’t actually see them because they are smaller than visible light itself. Third, they can be connected together in arrays with up to several billion transistors on a single integrated circuit and sold for a few dollars.

Although the details of transistor operation are complex and involve an understanding of quantum mechanics, the basic concepts are quite tractable. Equally, semiconductor manufacturing may involve devices smaller than a wavelength of light, but the fundamental construction mechanism is rather similar to etching or (old film) photography.

Although we are going to discuss silicon transistors, silicon is not the only superconducting material. The first transistors were made of the element germanium.

Silicon and Semiconductors

An insulator like glass, most plastics, and silicon dioxide (sand) does not conduct electricity. Apply a voltage across the ends of an insulator and the electrons do not flow. Apply a voltage across a metal and electrons will flow. Why? Because, it’s all about the relationship between electrons and atoms. An electron orbits the nucleus of an atom in one of several orbits or energy states. The behavior of electrons in solids (molecules and crystals) is more complex than their behavior in isolated atoms because electrons can several energy levels within a given band.

A fundamental property of matter is the  energy gap, called a band gap, between adjacent energy bands. It is the size of the band gap that determines the electrical properties of the material.

The outer energy band of an atom is called the valance band. Above this band there is a conduction band that is shared by the atoms of a crystal. An electron in the valence band is bound to its atom. An electron in the conduction band is free to wander.

Insulators have a large band gap and the valence band is full. Electrons cannot move into the conduction band and move about the crystal lattice. If there are no electrons in the conduction band, there can be no current because the valence electrons are bound to individual atoms and can’t go walkabout.  The resistance of a good conductor like silver is 1.59 x 10-8 Ω/m3, whereas the resistance of a plastic like Teflon is 1025 Ω/m3. This corresponds to a resistance range of 1:1032.

A semiconductor is a material whose resistance falls between that of an instructor and conductor. Although the first semiconductor used to create transistors was gallium, we are going to talk only about silicon.

A silicon atom in a silicon crystal is surrounded by four atoms in the valence band and electrons are shared between atoms as Figure 1 demonstrates. This figure is a fiction because the actual molecule is three dimensional, but the principle of sharing four electrons between four adjacent atoms still holds.

Figure 1 The silicon crystal (in two dimensions).

In Figure 1 the valence band electrons are bound to atoms and are not free to move. However, thermal energy can occasionally liberate an electron which then move into the conduction band and become free to move through the crystal. The atom that has lost its electron now has a net positive charge. Such an atom with a missing electron is called a hole (because it’s an empty place that can be filled). A hole is to semiconductors what an overdraft is to a bank account. It is now possible for this atom (the hole)  to pick up an electron from a neighboring atom. When this happens, it is as if the hole has moved. Conduction in a semiconductor can be treated as the movement of electrons in one direction or the movement of holes in the other direction.

The number of free electrons generated by thermal energy at room temperature is not significant. The great invention of semiconductor physics was the addition of tiny amounts of dopants or impurity atoms to the silicon crystal. There are two types of dopant; those with 3 electrons in the outer band and those with 5 electrons in the outer band. Suppose you add a dopant with 5 electrons. Four of these electrons can join up with the electrons of adjacent silicon atoms in the crystal lattice. One electron is left over and that electron is free to become a mobile conduction electron. This impurity is called a donor because it can provide electrons. The resulting doped silicon is called n-type silicon because it has mobile negatively charged electrons. Figure 2 illustrates this situation.

Figure 2 The n-type silicon with a donor atom (5 electrons)

If you perform the same exercise with a dopant with three electrons in the outer shell, three silicon atoms can join a dopant atom leaving an electron vacancy or hole. This is called p-type material and electrical conduction is via holes. Figure 3 illustrates p-type silicon.

Figure 3 The p-type silicon with a donor atom (3 electrons)

Let’s repeat this. The addition of very small quantities, one part in a million, of a dopant to silicon changes the electrical characteristics of the semiconductor and reduces its resistance by providing electrons or holes as charge carriers. So far, so pointless. The interesting bit comes when we place an n-type material against a p-type material and create an abrupt barrier or junction between n-type and p-type silicon.

Figure 4 shows three examples of the same pn-junction. On the left, no external power (source of current) is applied. Consider what will happen. In the n-type material, electrons from the donor atoms are free to move in the conduction band. When they drift to the junction, they find that they are in the p-type material and in hole-heaven. They can fill a hole and settle down. Similarly, holes can drift to the n-type material and find electrons to combine with. However, this idyllic situation cannot persist. If electrons depart the n-type material, they are going to leave a positive charge on the atoms in the lattice and that charge will prevent any further drift. Consequently, in the absence of an electrical field the junction with reach an equilibrium point.

Figure 4 The pn junction

Now consider the effect of applying a voltage across the junction with the positive terminal connected to the n-type silicon and the negative terminal connected to the p-type silicon. The middle figure illustrates this situation. The positive field from the battery is going to attract the negative electrons in the n-type material away from the junction. Similarly, the negative field from the battery will attract the positive holes in the p-type material. As a result, there are going to be no charge carriers available to cross the junction and flow through the device. In this configuration, the device in an insulator.

Now consider the right hand configuration with the negative battery terminal wires to the n-type and the positive battery terminal connected to p-type. In this case the electrons are repulsed from the negative terminal and attracted to the junction. Moreover, they are attracted across the junction by the field from the positive electrode. A current can now flow across the junction. Note that the figure shows current flow arrow in the opposite direction to the actual electron flow, because that is the convention by Benjamin Franklin.

The pn junction was one of the first semiconductor devices to be manufactured. It is used to convert AM radio waves into speech, it was used in pre-integrated circuit digital logic systems, and it is used to convert alternating current into direct current; that is, it is in every single power supply unit.

In 1947 the bipolar transistor was developed at Bell labs. This device had a double junction pnp (or npn) made by sandwiching n-type material between two slices of p-type material (or vice versa). This device was able to amplify signals. However, we do not discuss it further here, because the type of transistor used in digital circuits today has a different construction. W describe the field effect transistor, FET, that is used in circuits is called CMOS (complementary metal-oxide semiconductor).


In principle, the MOS transistor is neither conceptually complex, nor difficult to understand how it is manufactured. However, the precise details of its operation and manufacture are, to say the least, involved. Figure 5 illustrates the structure of a MOSFET. The acronym MOSFET means metal-oxide field-effect transistor. The term metal and oxide are now misnomers because they refer to conductors and insulators within the transistor that were once made of metals and silicon dioxide. Today, other materials are used to perform the same roles, although we still use the same terminology.

Figure 5 MOSFET transistor

Figure 5 provides a 2D representation of a 3D transistor. We are looking at the transistor from the side (i.e., it’s a cross section). . There are four terminals (connections): source, gate, drain, and the substrate (the p-type silicon). The action takes place in the p-type silicon layer immediately below the gate. The source and drain are both connected to the p-type silicon by negatively doped silicon. You would expect this to result in two back-to-back diodes permitting conduction in neither direction. It does not. The n-type silicon is labeled n+ to indicate that it is heavily doped. The doping is so heavy that the silicon ceases to be a semiconductor and behaves very much like a conductor. Consequently, we have a circuit consisting of a thin strip of p-type silicon between the source and drain terminals.

There are four varieties of MOSFET distinguished by channel type and enhancement/depletion mode. There are: n-channel depletion, n-channel enhancement, p-channel depletion, p-channel enhancement MOSFETS. The difference between enhancement and depletion is that a depletion device in normally on and an enhancement device is normally off. The structure of figure 5 is an nMOSFET or nFET.

Figure 6 demonstrates the MOSFET of figure 5 in a circuit. The substrate and source have been connected to ground, 0V. The drain is connected to a positive supply. If the voltage on the gate is zero, no current will flow through the p-type silicon vecause there are no free charge carriers. However, if a positive voltage is applied to the gate, this creates an electrostatic field in the silicon below it allowing negative charge carriers (i.e. electrons) to accumulate under the gate. This field creates a channel capable of carrying electrons, and this device is called an n-channel MOSFET.

Let’s state this again. Applying a positive voltage to the gate with respect to the source creates charge carriers under the gate and allows conduction between source and drain. In other words, we have created an electronic switch which is the fundamental element of all logic circuits. If we put two of these transistors in series, current will flow through them only if both gates are driven (AND function). Similarly, if we put two gates in parallel, one across the other, they will conduct if either one will conduct (OR function).

Figure 6 The nMOSFET in a circuit

If we reverse silicon types, we can create an inverse transistor that operates in the same way as the n-channel FET but with reversed polarities. Figure 7 describes this transistor. The cunning feature of this transistor is that the substrate is exactly the same as with the nFET. This is not a requirement of the transistor but a manufacturing necessity. If you are going to have nFETS and pFETS on the same silicon chip, they must both use the same substrate.

In figure 7 a region or well of n-type silicon encloses the transistor. This is the material through which the channel between source and drain with flow. The source and gate contacts are now heavily doped p-type material. In this case the transistor is operated by a negative voltage on the drain and a negative voltage on the gate is necessary to turn the device on to establish a p-channel between source and drain. The channel created under the gate is a p-channel capable of carrying holes and the device in a p-channel MOSFET.

Figure 7 The pFET

Putting it all together

If you construct circuits with both pMOS and nMOS transistors, the result is CMOS, complementary metal oxide semiconductor technology. CMOS was patented in 1967 and is the basis of all today’s integrated circuit technology. Essentially, it consists of pairs of pMOS and nMOS transistors in series. If you put these transistors in series, they will never conduct at the same time because the condition necessary to turn one on (the gate voltage) is the condition necessary to turn the other off. Consequently, CMOS technology consumes tiny amounts of power. This is because there is never a path between ground and the positive supply rail through the complementary transistor pair. Figure 8 describes the basis of the CMOS inverter.

The nMOS and pMOS transistors in figure 8 are in series. When the input voltage on the two gates is low (near ground), the lower nMOS transistor is turned off and the upper pMOS transistor is turned on. The output is therefore high, because the pMOS transistor connects the output to the positive rail. On the other hand, when the input is high, the situation is reversed and the nMOS transistor is turned on which forces the output to ground.

Consequently, the output voltage is the inverse of the input voltage and this circuit is an invertor.

Figure 8 The CMOS inverter

Figure 9 demonstrates how we can construct CMOS NAND and NOR gates. Although we teach students that the NAND gates is created by inverting the output of an AND gate, the inversion happens automatically in CMOS logic which means that a NAND gate is easier to fabricate than an AND gate.

Consider the left hand side of figure 9, the NAND gate. We know that the output of a NAND gate is low if and only if all its inputs are high. Suppose A and B are both 1 (electrically high). The gates of both the lower nFETs are driven positive and the two transistors conduct. They are in series and the output F is pulled down to ground. Note that both inputs to the upper pFETs are high. Because a high input turns off a pFET, both these transistors are effectively disconnected when A = B = 1.

Now, suppose A goes low. The upper nFET will be turned off and the output F no longer pulled down to ground. Moreover, a low level on A turns on the right-hand pFET and the output is pulled up a high level. The same situation occurs if B goes low or if both A and B are low.

Figure 9 MOS NAND and NOR gates

The right hand circuit is a NOR gate and is a mirror image of the NAND gate. The output of a NOR gate is high if both inputs are low. Otherwise, the output is low. If you inspect the NAND circuit you will see that the pFETs are in series and when both inputs A and B are low, the pFETs will be turned on and the output pulled up to a 1.  If either input is 1, one or both the series pFETs, will be turned of and one or both of the parallel nFETs will be turned on to drive the output to ground.

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